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@ycsin ycsin commented Nov 12, 2024

See #81215
See #81256

FPU_SHARING depends on riscv_plic_irq_is_pending() & riscv_plic_irq_clear_pending()

The currently IPI implementation assumes that CLINT exists in the
system, however, that might not be the case as IPI can be implemented
with PLIC that supports software-triggering as well, such as the Andes
NCEPLIC100.

Refactor the CLINT-based IPI implementations into `ipi_clint.c`, and
create Kconfig that selects the CLINT implementation when
`sifive-clint0` exists and enabled, otherwise default to
`RISCV_SMP_IPI_CUSTOM` which allows OOT implementation. This also
makes way for the upstreaming of non-clint IPI implementation later.

Signed-off-by: Yong Cong Sin <[email protected]>
Add PLIC-based IPI implementation.

Signed-off-by: Yong Cong Sin <[email protected]>
@ycsin ycsin force-pushed the pr/riscv-ipi-plic-alt branch from d8ea9b7 to 998cfd5 Compare November 12, 2024 06:46
@ycsin ycsin added area: RISCV RISCV Architecture (32-bit & 64-bit) area: SMP Symmetric multiprocessing labels Nov 12, 2024
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Normally, the device tree should contain stuff that describes the hardware
in a generic way. Here, the fact that FPU and scheduling are assigned IRQ
values in DT is too much software implementation details to live in DT. You
should see the device tree information as something that any operating
system may consume, and another OS implementation could opt to do things
differently,. There are exceptions already, but we should refrain from
adding more of them.

You should consider only listing in the DT all those IRQs that are available
for IPI usage and do the assignment in the source code instead.

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ycsin commented Nov 14, 2024

CI failure is unrelated and fixed by #81367

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npitre commented Nov 14, 2024 via email

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ycsin commented Nov 14, 2024

DT usage still needs fixing per my earlier comment.

Sure, I remember I met some difficulties to generate IRQ_CONNECT()s with LISTIFY() for the second half of the IPIs (FPU). Specifically, I'm not sure how to make the LISTIFY() start from non-zero. But I can try again later.

The FPU part also requires the following PLIC functions that I have yet to work on:

  • riscv_plic_irq_is_pending()
  • riscv_plic_irq_clear_pending()

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npitre commented Nov 14, 2024 via email

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This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time.

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